zynq的xilinx_axidma驱动测试

参考Petalinux2020.2 开发ZYNQ的AXI DMA.zhihuxilinx_axidma.github改后代码xilinx_axidma.gitee设备树pl.dtsipetalinux自动生成的/home/minglie/petalinux/antdma/components/plnx_workspace/device-tree/device-tree/* * CAUTION: Thisfileis automatically generated by Xilinx. * Version: * Today is: Tue Jul2116:48:142026*/ /{amba_pl: amba_pl{#address-cells 1;#size-cells 1;compatiblesimple-bus;ranges;axi_dma_0: dma40400000{#dma-cells 1;clock-namess_axi_lite_aclk,m_axi_mm2s_aclk,m_axi_s2mm_aclk;clocksclkc15,clkc15,clkc15;compatiblexlnx,axi-dma-7.1,xlnx,axi-dma-1.00.a;interrupt-namesmm2s_introut,s2mm_introut;interrupt-parentintc;interrupts02940304;reg0x40400000 0x10000;xlnx,addrwidth0x20;xlnx,sg-length-width0xe;dma-channel40400000{compatiblexlnx,axi-dma-mm2s-channel;dma-channels0x1;interrupts0294;xlnx,datawidth0x40;xlnx,device-id0x0;};dma-channel40400030{compatiblexlnx,axi-dma-s2mm-channel;dma-channels0x1;interrupts0304;xlnx,datawidth0x40;xlnx,device-id0x0;};};};};system-user.dtsi用户覆盖的antdma/project-spec/meta-user/recipes-bsp/device-tree/files/include/system-conf.dtsi/{};amba_pl{axidma_chrdev: axidma_chrdev0{compatiblexlnx,axidma-chrdev;dmasaxi_dma_00axi_dma_01;dma-namestx_channel,rx_channel;};};axi_dma_0{dma-channel40400000{xlnx,device-id0x0;};dma-channel40400030{xlnx,device-id0x1;};};编译驱动makeKBUILD_DIR/home/minglie/workspace/kernel-driver/linux-xlnx-xlnx_rebase_v5.4_2020.2 build编译appmakeexamplesBD简单回环测试qq_ant_axi_dma_system.tcl地址映射模块路径接口名称端口类型内存范围 (Range)基地址 (Base Address)结束地址 (End Address)/axi_dma_0/Data_MM2Sprocessing_system7_0/S_AXI_HP0S_AXI_HP0512M0x0000_00000x1FFF_FFFF/axi_dma_0/Data_S2MMprocessing_system7_0/S_AXI_HP0S_AXI_HP0512M0x0000_00000x1FFF_FFFF/processing_system7_0/Data/axi_dma_0/S_AXI_LITES_AXI_LITE64K0x4040_00000x4040_FFFF测试# 1. 生成 4KB 的随机测试文件ddif/dev/urandomof4k.binbs4Kcount1# 2. 运行 DMA 传输./axidma_transfer-t0-r14k.bin out_4k.bin# 3. 校验 MD5md5sum 4k.bin out_4k.bin 5cf6cbb7256f239283d47a1e9eb73c26 4k.bin 5cf6cbb7256f239283d47a1e9eb73c26 out_4k.bin# 比较两个文件差异cmp-l1m.bin out_1m.bin|head-n10